1. Field of the Invention
The present invention is related to a frequency synthesizer and, more particularly, a digital frequency synthesizer.
2. Background Art
Digital frequency synthesizers are well known in the art. One form of digital frequency synthesizer includes a digital-to-phase converter (DPC) having a delay lock loop (DLL) which includes a delay line. A problem with delay lines is that they suffer from delay variations along the delay line, which ultimately limits phase resolution and, hence, the spurious frequency performance of the digital frequency synthesizer.
It is desirable to provide a digital frequency synthesizer having improved phase resolution over prior art DLLs while avoiding the use of tuning circuitry or the cancellation of delay mismatches while also achieving xe2x88x9280 dBc spurious frequency performance.